Design Verification Engineer

Department: Services
Project Location(s): Iasi, Suceava
Education: BS degree in Computer Science / Applied Electronics, Micro-, Opto- and nanotechnologies

Position details

Job Type: Full-time
Employment Type: Permanent
Start date: ASAP
Number of positions: 3

Summary

We’re in a business where building a better future is the goal. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, explore the opportunities available and come join our team.

Job requirements

  • Desirable candidates have a BS degree in Computer Science/Applied Electronics, Micro-, Opto- and nanotechnologies and 2+ years of experience
  • Strong understanding of computer architecture
  • Strong knowledge of object-oriented programming languages (System Verilog or C++)
  • Strong debugging skills
  • Directed test-bench programming and creation of self-checking test benches
  • Fluency in verbal and written English

 Nice to have

  • Knowledge of verification methodologies like UVM
  • Direct experience with Verilog simulators
  • Assembly programming
  • Experience in Mixed-Signal verification
  • Constrained-random stimulus generation

 Personal Competences

  • Analytical thinking
  • Goal-oriented (maintaining focus on agreed objectives and deliverables whatever the circumstances)
  • Good communication skills, the capacity to work within a team
  • Individual responsibility and a strong desire for personal achievements
  • The desire to evolve towards a very good professional & technical level

 Expected tasks

  • Perform functional feature verification of high-speed Microprocessor designs
  • Define, develop, and execute test/coverage plans at unit and system level
  • Based on a thorough understanding of the design architecture, to develop, run and debug directed tests, random exercisers, and the needed infrastructure to validate functionality (Checkers/Monitors/etc.)
  • UVM/C++ based testbench development
  • System Verilog/X86 Assembly test development
  • Debug designs in Verilog and System Verilog
  • Develop verification flow enhancements using a scripting language

 Benefits

  • Competitive salary package
  • Challenging and professional work environment within a global organization
  • Mentorship programs and various training sessions
  • Team events
  • Opportunity to work for/with international top companies
  • Flexible working schedule and possibility to work from home
  • Meal vouchers card
  • Access to 7card and Bookster
  • Bonuses occasioned by personal events
  • Holiday bonuses and gifts
  • Private medical health insurance

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